LM3S5R36_13 Datasheet, PDF (850/1063 Pages) Texas Instruments – LM3S5R36 Microcontroller

NRND: Not recommended for new designs.
Universal Serial Bus (USB) Controller
Bit/Field
4
Name
DISNYET / PIDERR
Type
R/W
3
DMAMOD
R/W
2:0
reserved
RO
Reset
0
Description
Disable NYET / PID Error
Value Description
0 No effect.
1 For bulk or interrupt transactions: Disables the sending of NYET
handshakes. When this bit is set, all successfully received
packets are acknowledged, including at the point at which the
FIFO becomes full.
For isochronous transactions: Indicates a PID error in the
received packet.
0
DMA Request Mode
Value Description
0 An interrupt is generated after every µDMA packet transfer.
1 An interrupt is generated only after the entire μDMA transfer is
complete.
Note: This bit must not be cleared either before or in the same cycle
as the above DMAEN bit is cleared.
0x0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
850
October 06, 2012
Texas Instruments-Production Data