LM3S5R36_13 Datasheet, PDF (692/1063 Pages) Texas Instruments – LM3S5R36 Microcontroller

NRND: Not recommended for new designs.
Synchronous Serial Interface (SSI)
Bit/Field
0
Name
RORMIS
Type
RO
Reset
0
Description
SSI Receive Overrun Masked Interrupt Status
Value Description
0 An interrupt has not occurred or is masked.
1 An unmasked interrupt was signaled due to the receive FIFO
overflowing.
This bit is cleared when a 1 is written to the RORIC bit in the SSI
Interrupt Clear (SSIICR) register.
692
October 06, 2012
Texas Instruments-Production Data