LM3S5R36_13 Datasheet, PDF (1010/1063 Pages) Texas Instruments – LM3S5R36 Microcontroller

Electrical Characteristics
NRND: Not recommended for new designs.
Table 24-25. SSI Characteristics (continued)
Parameter
No.
Parameter Parameter Name
Min Nom Max
Unit
S3
T_{CLK_LOW}
SSIClk low time
S4
T_CLKRF
SSIClk rise/fall time^b
-
0.5
-
-
4
6
t clk_per
ns
S5
T_DMD
Data from master valid delay time
0
-
1
system clocks
S6
T_DMS
Data from master setup time
1
-
-
system clocks
S7
T_DMH
Data from master hold time
2
-
-
system clocks
S8
T_DSS
Data from slave setup time
1
-
-
system clocks
S9
T_DSH
Data from slave hold time
2
-
-
system clocks
a. In master mode, the system clock must be at least twice as fast as the SSIClk; in slave mode, the system clock must be
at least 12 times faster than the SSIClk.
b. Note that the delays shown are using 8-mA drive strength.
Figure 24-14. SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing Measurement
S1
S2
S4
SSIClk
S3
SSIFss
SSITx
SSIRx
MSB
4 to 16 bits
LSB
Figure 24-15. SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer
S2
S1
SSIClk
S3
SSIFss
SSITx
SSIRx
MSB
8-bit control
LSB
0 MSB
LSB
4 to 16 bits output data
1010
Texas Instruments-Production Data
October 06, 2012