LM3S5R36_13 Datasheet, PDF (1026/1063 Pages) Texas Instruments – LM3S5R36 Microcontroller

Register Quick Reference
NRND: Not recommended for new designs.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DMAUSEBURSTCLR, type WO, offset 0x01C, reset -
CLR[n]
CLR[n]
DMAREQMASKSET, type R/W, offset 0x020, reset 0x0000.0000
SET[n]
SET[n]
DMAREQMASKCLR, type WO, offset 0x024, reset -
CLR[n]
CLR[n]
DMAENASET, type R/W, offset 0x028, reset 0x0000.0000
SET[n]
SET[n]
DMAENACLR, type WO, offset 0x02C, reset -
CLR[n]
CLR[n]
DMAALTSET, type R/W, offset 0x030, reset 0x0000.0000
SET[n]
SET[n]
DMAALTCLR, type WO, offset 0x034, reset -
CLR[n]
CLR[n]
DMAPRIOSET, type R/W, offset 0x038, reset 0x0000.0000
SET[n]
SET[n]
DMAPRIOCLR, type WO, offset 0x03C, reset -
CLR[n]
CLR[n]
DMAERRCLR, type R/W, offset 0x04C, reset 0x0000.0000
DMACHASGN, type R/W, offset 0x500, reset 0x0000.0000
DMAPeriphID0, type RO, offset 0xFE0, reset 0x0000.0030
CHASGN[n]
CHASGN[n]
ERRCLR
DMAPeriphID1, type RO, offset 0xFE4, reset 0x0000.00B2
PID0
DMAPeriphID2, type RO, offset 0xFE8, reset 0x0000.000B
PID1
DMAPeriphID3, type RO, offset 0xFEC, reset 0x0000.0000
PID2
DMAPeriphID4, type RO, offset 0xFD0, reset 0x0000.0004
PID3
DMAPCellID0, type RO, offset 0xFF0, reset 0x0000.000D
PID4
CID0
1026
Texas Instruments-Production Data
October 06, 2012