LM3S5R36_13 Datasheet, PDF (32/1063 Pages) Texas Instruments – LM3S5R36 Microcontroller

Table of Contents
NRND: Not recommended for new designs.
Register 87: PWM3 Fault Status 1 (PWM3FLTSTAT1), offset 0x988 .................................................... 947
Quadrature Encoder Interface (QEI) .......................................................................................... 950
Register 1: QEI Control (QEICTL), offset 0x000 ................................................................................ 956
Register 2: QEI Status (QEISTAT), offset 0x004 ................................................................................ 959
Register 3: QEI Position (QEIPOS), offset 0x008 .............................................................................. 960
Register 4: QEI Maximum Position (QEIMAXPOS), offset 0x00C ....................................................... 961
Register 5: QEI Timer Load (QEILOAD), offset 0x010 ....................................................................... 962
Register 6: QEI Timer (QEITIME), offset 0x014 ................................................................................. 963
Register 7: QEI Velocity Counter (QEICOUNT), offset 0x018 ............................................................. 964
Register 8: QEI Velocity (QEISPEED), offset 0x01C .......................................................................... 965
Register 9: QEI Interrupt Enable (QEIINTEN), offset 0x020 ............................................................... 966
Register 10: QEI Raw Interrupt Status (QEIRIS), offset 0x024 ............................................................. 968
Register 11: QEI Interrupt Status and Clear (QEIISC), offset 0x028 ..................................................... 970
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October 06, 2012
Texas Instruments-Production Data