LM3S5R36_13 Datasheet, PDF (1052/1063 Pages) Texas Instruments – LM3S5R36 Microcontroller

Register Quick Reference
NRND: Not recommended for new designs.
31
30
29
28
27
26
25
24
23
22
15
14
13
12
11
10
9
8
7
6
PWM2CMPB, type R/W, offset 0x0DC, reset 0x0000.0000 (see page 928)
PWM3CMPB, type R/W, offset 0x11C, reset 0x0000.0000 (see page 928)
COMPB
PWM0GENA, type R/W, offset 0x060, reset 0x0000.0000 (see page 929)
COMPB
ACTCMPBD
ACTCMPBU
PWM1GENA, type R/W, offset 0x0A0, reset 0x0000.0000 (see page 929)
ACTCMPAD
ACTCMPBD
ACTCMPBU
PWM2GENA, type R/W, offset 0x0E0, reset 0x0000.0000 (see page 929)
ACTCMPAD
ACTCMPBD
ACTCMPBU
PWM3GENA, type R/W, offset 0x120, reset 0x0000.0000 (see page 929)
ACTCMPAD
ACTCMPBD
ACTCMPBU
PWM0GENB, type R/W, offset 0x064, reset 0x0000.0000 (see page 932)
ACTCMPAD
ACTCMPBD
ACTCMPBU
PWM1GENB, type R/W, offset 0x0A4, reset 0x0000.0000 (see page 932)
ACTCMPAD
ACTCMPBD
ACTCMPBU
PWM2GENB, type R/W, offset 0x0E4, reset 0x0000.0000 (see page 932)
ACTCMPAD
ACTCMPBD
ACTCMPBU
PWM3GENB, type R/W, offset 0x124, reset 0x0000.0000 (see page 932)
ACTCMPAD
ACTCMPBD
ACTCMPBU
PWM0DBCTL, type R/W, offset 0x068, reset 0x0000.0000 (see page 935)
ACTCMPAD
21
20
5
4
ACTCMPAU
ACTCMPAU
ACTCMPAU
ACTCMPAU
ACTCMPAU
ACTCMPAU
ACTCMPAU
ACTCMPAU
PWM1DBCTL, type R/W, offset 0x0A8, reset 0x0000.0000 (see page 935)
PWM2DBCTL, type R/W, offset 0x0E8, reset 0x0000.0000 (see page 935)
PWM3DBCTL, type R/W, offset 0x128, reset 0x0000.0000 (see page 935)
PWM0DBRISE, type R/W, offset 0x06C, reset 0x0000.0000 (see page 936)
PWM1DBRISE, type R/W, offset 0x0AC, reset 0x0000.0000 (see page 936)
PWM2DBRISE, type R/W, offset 0x0EC, reset 0x0000.0000 (see page 936)
RISEDELAY
RISEDELAY
RISEDELAY
19
18
3
2
ACTLOAD
ACTLOAD
ACTLOAD
ACTLOAD
ACTLOAD
ACTLOAD
ACTLOAD
ACTLOAD
17
16
1
0
ACTZERO
ACTZERO
ACTZERO
ACTZERO
ACTZERO
ACTZERO
ACTZERO
ACTZERO
ENABLE
ENABLE
ENABLE
ENABLE
1052
Texas Instruments-Production Data
October 06, 2012