LM3S5R36_13 Datasheet, PDF (842/1063 Pages) Texas Instruments – LM3S5R36 Microcontroller

NRND: Not recommended for new designs.
Universal Serial Bus (USB) Controller
Bit/Field
2
1:0
Name
DMAMOD
reserved
Type
R/W
RO
Reset
0
0
Description
DMA Request Mode
Value Description
0 An interrupt is generated after every µDMA packet transfer.
1 An interrupt is generated only after the entire μDMA transfer is
complete.
Note: This bit must not be cleared either before or in the same cycle
as the above DMAEN bit is cleared.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
842
October 06, 2012
Texas Instruments-Production Data