LM3S5R36_13 Datasheet, PDF (137/1063 Pages) Texas Instruments – LM3S5R36 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S5R36 Microcontroller
Bit/Field
0
Name
DISMCYC
Type
R/W
Reset
0
Description
Disable Interrupts of Multiple Cycle Instructions
Value Description
0 No effect.
1 Disables interruption of load multiple and store multiple
instructions. In this situation, the interrupt latency of the
processor is increased because any LDM or STM must complete
before the processor can stack the current state and enter the
interrupt handler.
October 06, 2012
137
Texas Instruments-Production Data