LM3S5R36_13 Datasheet, PDF (512/1063 Pages) Texas Instruments – LM3S5R36 Microcontroller

Watchdog Timers
NRND: Not recommended for new designs.
Bit/Field
1
0
Name
RESEN
INTEN
Type
R/W
R/W
Reset
0
Description
Watchdog Reset Enable
The RESEN values are defined as follows:
Value Description
0 Disabled.
1 Enable the Watchdog module reset output.
0
Watchdog Interrupt Enable
The INTEN values are defined as follows:
Value Description
0 Interrupt event disabled (once this bit is set, it can only be
cleared by a hardware reset).
1 Interrupt event enabled. Once enabled, all writes are ignored.
512
October 06, 2012
Texas Instruments-Production Data