LM3S5R36_13 Datasheet, PDF (976/1063 Pages) Texas Instruments – LM3S5R36 Microcontroller

Signal Tables
NRND: Not recommended for new designs.
Table 22-2. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
PA0
I2C1SCL
I/O
TTL
GPIO port A bit 0.
I/O
OD
I²C module 1 clock.
17
U0Rx
I
TTL
UART module 0 receive. When in IrDA mode, this signal has IrDA
modulation.
U1Rx
I
TTL
UART module 1 receive. When in IrDA mode, this signal has IrDA
modulation.
PA1
I2C1SDA
I/O
TTL
GPIO port A bit 1.
I/O
OD
I²C module 1 data.
18
U0Tx
O
TTL
UART module 0 transmit. When in IrDA mode, this signal has IrDA
modulation.
U1Tx
O
TTL
UART module 1 transmit. When in IrDA mode, this signal has IrDA
modulation.
PA2
I/O
TTL
GPIO port A bit 2.
19
PWM4
O
TTL
PWM 4. This signal is controlled by PWM Generator 2.
SSI0Clk
I/O
TTL
SSI module 0 clock
PA3
I/O
TTL
GPIO port A bit 3.
20
PWM5
O
TTL
PWM 5. This signal is controlled by PWM Generator 2.
SSI0Fss
I/O
TTL
SSI module 0 frame signal
PA4
I/O
TTL
GPIO port A bit 4.
CAN0Rx
I
TTL
CAN module 0 receive.
21
PWM6
O
TTL
PWM 6. This signal is controlled by PWM Generator 3.
SSI0Rx
I
TTL
SSI module 0 receive
PA5
I/O
TTL
GPIO port A bit 5.
CAN0Tx
O
TTL
CAN module 0 transmit.
22
PWM7
O
TTL
PWM 7. This signal is controlled by PWM Generator 3.
SSI0Tx
O
TTL
SSI module 0 transmit
VDDC
23
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals. The voltage on this pin is
1.3 V and is supplied by the on-chip LDO. The VDDC pins should
only be connected to the LDO pin and an external capacitor as
specified in .
24
GND
-
Power Ground reference for logic and I/O pins.
PA6
I/O
TTL
GPIO port A bit 6.
CAN0Rx
I
TTL
CAN module 0 receive.
CCP1
I/O
TTL
Capture/Compare/PWM 1.
25
I2C1SCL
I/O
OD
I²C module 1 clock.
PWM0
O
TTL
PWM 0. This signal is controlled by PWM Generator 0.
PWM4
O
TTL
PWM 4. This signal is controlled by PWM Generator 2.
976
October 06, 2012
Texas Instruments-Production Data