LM3S5R36_13 Datasheet, PDF (497/1063 Pages) Texas Instruments – LM3S5R36 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S5R36 Microcontroller
Register 13: GPTM Timer A Prescale (GPTMTAPR), offset 0x038
This register allows software to extend the range of the 16-bit timers in periodic and one-shot modes.
In Edge-Count mode, this register is the MSB of the 24-bit count value.
GPTM Timer A Prescale (GPTMTAPR)
Timer 0 base: 0x4003.0000
Timer 1 base: 0x4003.1000
Timer 2 base: 0x4003.2000
Timer 3 base: 0x4003.3000
Offset 0x038
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
TAPSR
Type RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:8
7:0
Name
reserved
TAPSR
Type
RO
R/W
Reset
0
0x00
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
GPTM Timer A Prescale
The register loads this value on a write. A read returns the current value
of the register.
Refer to Table 10-5 on page 464 for more details and an example.
October 06, 2012
497
Texas Instruments-Production Data