HD64F7045F28V Datasheet, PDF (750/925 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7040 Series

VerifyLoop
MOV.L
MOV.L
MOV.L
Wait_7 SUBC
BF
;
MOV.L
MOV.L
CMP/EQ
BT
MOV.L
XOR
NOT
OR
MOV.L
Verify_OK
ADD.L
ADD.L
CMP/PL
BT
;
MOV.L
AND.B
Wait_8 SUBC
BF
;
CMP/PL
BF
ADD
MOV.L
MOV.L
CMP/EQ
BT
BRA
NOP
Program_OK
710
.EQU
$
R11,@R12
R11,@R3
#Wait2u,R7
R2,R7
Wait_7
; Write H'FF to verify address
; Reprogram data RAM (PdataBuff) initialization
; Wait 2 µs
@R12+,R7
@R1+,R8
R7,R8
Verify_OK
#1,R10
R8,R7
R7,R7
R7,R8
R8,@R3
.EQU
$
#4,R3
#-1,R13
R13
VerifyLoop
; Verify
; Verify NG, m <- 1
; Program data computation
; Store in reprogram data RAM (PdataBuff)
#Wait4u,R7
#PVCLEAR,@(R0,GBR)
R2,R7
Wait_8
; Clear PV
; Wait 4 µs
R10 ; if m=0 then GOTO Program_OK
Program_OK
#1,R9
#NG,R7
; R7 <- NG (return value)
#MAXVerify,R12
; if n>=MAXVerify then Program NG
R9,R12
Program_end
Program_loop
.EQU
$