HD64F7045F28V Datasheet, PDF (612/925 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7040 Series

16.2.2 A/D Control/Status Register (ADCSR0, ADCSR1)
The A/D control/status registers (ADCSR0, 1) are registers that can read/write in 8 bits and control
A/D converter operations such as mode selection. There are the ADCSR0 (A/D0) and ADCSR1
(A/D1).
The ADCSR is initialized to H'00 during power-on reset or standby mode. Manual reset does not
initialize ADCSR.
Bit : 7
6
5
4
3
2
1
0
ADF ADIE ADST SCAN CKS
—
CH1
CH0
Initial value : ⁰
0
0
0
0
0
R/W : R/(W)^* R/W
R/W
R/W
R/W
R
1
0
R/W
R/W
Note: * Only 0 can be written to clear the flag.
• Bit 7—A/D End Flag (ADF): Status flag that indicates end of A/D conversion.
Bit 7:
ADF
0
1
Description
[Clear conditions]
(Initial value)
1. Writing 0 to ADF after reading ADF with ADF=1
2. When registers of the mid-speed converter are accessed after the DMAC and DTC
are activated by ADI interrupt.
[Set conditions]
1. Single mode: When A/D conversion is complete
2. Scan mode: When A/D conversion of all designated channels are complete
• Bit 6—A/D Interrupt Enable (ADIE): Enables or disables interrupt request (ADI) due to
completion of A/D conversion.
Bit 6:
ADIE
0
1
Description
Disables interrupt request (ADI) due to completion of A/D conversion
Enables interrupt request (ADI) due to completion of A/D conversion
(Initial value)
572