HD64F7045F28V Datasheet, PDF (678/925 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7040 Series

18.3.13 Port E I/O Register (PEIOR)
The port E I/O register (PEIOR) is a 16-bit read/write register that selects input or output for the
16 port E pins. Bits PE15IOR–PE0IOR correspond to pins PE15/TIOC4D/DACK1/IRQOUT–
PE0/TIOC0A/DREQ0. PEIOR is enabled when the port E pins function as general input/outputs
(PE15–PE0) or TIOC pin of the MTU. For other functions, it is disabled.
When the port E pin functions are as PE15–PE0, or TIOC pin of the MTU, a given pin in port E is
an output pin if its corresponding PEIOR bit is set to 1, and an input pin if the bit is cleared to 0.
PEIOR is initialized to H'0000 by external power-on reset; however, it is not initialized for manual
resets, reset by WDT, standby mode, or sleep mode, so the previous data is maintained.
Bit: 15
14
13
12
11
10
9
8
PE15 PE14 PE13 PE12 PE11 PE10 PE9 PE8
IOR
IOR
IOR
IOR
IOR
IOR
IOR
IOR
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0
IOR
IOR
IOR
IOR
IOR
IOR
IOR
IOR
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
18.3.14 Port E Control Registers 1, 2 (PECR1 and PECR2)
PECR1 and PECR2 are 16-bit read/write registers that select the functions of the sixteen
multiplexed pins of port E. PECR1 selects the functions of the upper eight bit pins of port E;
PECR2 selects the function of the lower eight bit pins of port E.
Port E has a bus control signal (AH) and DMAC control signals (DACK1, DACK0, DRAK1,
DRAK0), but there are instances when the register settings that select these pin functions will be
ignored, depending on the operation mode. Refer to table 18.2, Pin Arrangement by Mode, for
details.
PECR1 and PECR2 are both initialized to H'0000 by external power-on reset but are not initialized
for manual resets, reset by WDT, standby mode, or sleep mode, so the previous data is maintained.
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