HD64F7045F28V Datasheet, PDF (510/925 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7040 Series

14.1.2 Block Diagram
Figure 14.1 shows a block diagram of the SCI.
Module data bus
RxD
TxD
SCK
RDR
TDR
SSR
BRR
SCR
RSR
TSR
SMR
Transmit/
receive control
Baud rate
generator
Parity
generation
Clock
Parity check
External clock
RSR: Receive shift register
RDR: Receive data register
TSR : Transmit shift register
TDR : Transmit data register
SCI
SMR: Serial mode register
SCR : Serial control register
SSR : Serial status register
BRR : Bit rate register
Figure 14.1 SCI Block Diagram
Internal
data bus
φ
φ/4
φ/16
φ/64
TEI
TxI
RxI
ERI
470