HD64F7045F28V Datasheet, PDF (584/925 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7040 Series

15.2.3 A/D Control Register (ADCR)
The ADCR is an 8-bit read/write register used for A/D conversion operation control. The ADCR is
initialized to H'00 by power-on reset or in standby mode. Manual reset does not initialize.
Bit: 7
—
Initial value: 0
R/W: R
6
PWR
0
R/W
5
4
3
TRGS1 TRGS0 SCAN
0
0
0
R/W R/W R/W
2
DSMP
0
R/W
1
BUFE1
0
R/W
0
BUFE0
0
R/W
• Bit 7—Reserved: This bit always reads as 0. The write value should always be 0.
• Bit 6—Power (PWR): Designates the conversion start mode for the high speed A/D converter.
Setting the PWR bit to 1 sets high speed start mode, and a 0 sets to low power conversion
mode. See section 15.4.7, Conversion Start Modes, for details on the conversion start
operation.
Set the PWR bit only while conversion is halted.
Bit 6: PWR
0
1
Description
Low power conversion mode (initial value)
High speed start mode
• Bits 5 and 4—Timer Trigger Select 1, 0 (TRGS1, TRGS0): These bits enable or prohibit A/D
conversion starts by trigger signals.
Set the TRGS1, TRGS0 bits only while conversion is halted.
Bit 5: TRGS1
0
0
1
1
Bit 4: TRGS0
0
1
0
1
Description
Enable A/D conversion start by software (initial value)
Enables A/D conversion start by MTU conversion start trigger
Reserved
Enables A/D conversion start by external trigger pin (ADTRG)
• Bit 3—Scan Mode (SCAN): Selects either single mode or scan mode for the A/D conversion
operation mode. See section 15.4, Operation, for details on single mode and scan mode
operation.
Set the SCAN bit only while conversion is halted.
Bit 3: SCAN
0
1
Description
Single mode (initial value)
Scan mode
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