HD64F7045F28V Datasheet, PDF (536/925 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7040 Series

Table 14.4 Bit Rates and BRR Settings in Clocked Synchronous Mode (cont)
φ (MHz)
Bit Rate
30
32
(Bits/s) n
N
n
N
n
110
250
500
3
233
3
249
1k
3
116
3
124
3
2.5k
2
187
2
199
2
5k
2
93
2
99
2
10k
1
187
1
199
1
25k
1
74
1
79
1
50k
0
149
0
159
0
100k
0
74
0
79
0
250k
0
29
0
31
0
500k
0
14
0
15
0
1M
0
7
0
7
0
2.5M
0
2
0
2
0
5M
—
—
—
—
—
7M
—
—
—
—
—
Note: Settings with an error of 1% or less are recommended.
Legend
Blank: No setting available
—: Setting possible, but error occurs
*: Continuous transmission/reception is not possible.
The BRR setting is calculated as follows:
33
N
128
205
102
205
82
164
82
32
16
7
2
—
—
33.3333
n
N
3
129
2
207
2
103
1
207
1
82
0
166
0
82
0
32
0
16
0
7
—
—
—
—
—
—
Asynchronous mode:
φ
N= _{64 × 22n–1 × B}
× 10⁶ –1
Synchronous mode:
N=
φ
64 × 2^2n–1 × B
× 10⁶ –1
496