HD64F7045F28V Datasheet, PDF (493/925 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7040 Series

12.11.4 POE timing
Figure 12.128 shows an example of timing from POE input to high impedance of pin.
CK
POE input
CK last transition
Last transition edge detected
PE9/TIOC3B
High impedance state^*
Note: * Other high current pins (PE11/TICO3D, PE12/TIOC4A, PE13/TIOC4B/MRES,
PE14/TIOC4C/DACK0/AH, PE15/TIOC4D/DACK1/IRQOUT) will enter the high
impedance state with the same timing.
Figure 12.128 Last Transition Edge Detection Operation
12.11.5 Usage Notes
To perform POE level detection, first set POE input to high level.
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