HD64F7045F28V Datasheet, PDF (431/925 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7040 Series

12.7.4 Contention between TCNT Write and Increment
If a count-up signal is issued in the T₂ state during the TCNT write cycle, TCNT write has priority,
and the counter is not incremented (figure 12.78).
TCNT write cycle
T₁
T₂
φ
Address
TCNT address
Write signal
TCNT input
clock
TCNT
N
M
TCNT write data
Figure 12.78 TCNT Write and Increment Contention
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