PXB4219E Datasheet, PDF (98/290 Pages) Infineon Technologies AG – Interworking Element for 8 E1/T1 Lines

IWE8, V3.4
PXB 4219E, PXB 4220E, PXB 4221E
Interface Description
5.1.2.2 E1 Mode
FRCLK[7:0]
FRDAT[7:0]
FRMFB[7:0]
FRFRS[7:0]
FRLOS[7:0]
FTCKO[7:0]
FTDAT[7:0]
FTMFS[7:0]
Framer Receive Clock
Receive clock input with 2.048 MHz
Framer Receive Data
depending on bit “frri” in “opmo”
0=
FRDAT is sampled with the falling edge of FRCLK
1=
FRDAT is sampled with the rising edge of FRCLK
Framer Receive Multiframe Begin
Depending on bits p_ces in pcfN:
0=
Structured CES: A pulse on this pin designates the
first frame of a new multiframe
1=
Unstructured CES: Unused, no constant level
allowed
depending on bit “rfpp” in “opmo”:
0=
FRMFB is active low
1=
FRMFB is active high
FRMFB is always sampled with the falling edge of FRCLK.
Framer Receive Frame Synchronization Pulse
Permanently inactive
Framer Receive Loss of Signalling
Framer Transmit Clock
depending on bits ftckn in ftcs:
00 =
depending on bit “rts_eval” in “opmo”:
0 = Transmit clock input with 2.048 MHz
1 = Clock of ICRC is used as transmit clock and is
also switched to FTCKO pins (FTCKO is output
pin)
01 =
FRCLK
10 =
Clock derived from RFCLK
11 =
No clock
Framer Transmit Data
depending on bit “ftri” in “opmo”:
0=
FTDAT is clocked with the falling edge of FTCKO
1=
FTDAT is clocked with the rising edge of FTCKO
Framer Transmit Multiframe Synchronization
Data Sheet
98
2003-01-20