PXB4219E Datasheet, PDF (132/290 Pages) Infineon Technologies AG – Interworking Element for 8 E1/T1 Lines

IWE8, V3.4
PXB 4219E, PXB 4220E, PXB 4221E
Memory Structure
X = If pcfN[p_ces] = 1 or [aal0] = 1
0 = Disabled
1 = Enabled
channel_
mode
Channel mode
00 = Inactive mode
01 = Active mode (normal mode)
10 = Standby mode
11 = Active mode (normal mode)
ref_slot
Reference slot indicator
1 = This slot is a reference slot
1) _{non-P format, cell may have only 46 user data octets in P format}
2) _{Cb: Required bytes for the CAS sub-block in an ATM cell}
Note: To allow IWE8 internal initialization, all channels must remain in inactive mode for
at least 250 µs after activation of the port (i.e. setting pcfN[p_rx_act] = 1). During
this time the device connected to the Framer Transmit Interface has to be in
normal operation.
Note: If frame based SDT without CAS is used and filling level ≤ 45, the condition
band_width ≤ part_fill has to be fulfilled for correct operation.
Multiframe based SDT without CAS should not be used.
6.1.2.4 RAM2: AAL Transmit Continuation Slot
Read/write Address 00400_H to 005FF_H
Reset value: Not applicable. RAM must be reset and initialized via SW.
31
next_slot_nr[4:0]
23
Not used
15
Not used
7
Not used
ref_slot_nr[4:0]
24
Not used
16
slot_index[4:0]
cont_slot
=1
8
0
ref_slot
=0
Data Sheet
132
2003-01-20