PXB4219E Datasheet, PDF (205/290 Pages) Infineon Technologies AG – Interworking Element for 8 E1/T1 Lines

IWE8, V3.4
PXB 4219E, PXB 4220E, PXB 4221E
Register Description
01 =
10 =
11 =
Transmit clock generation of this port is based on the adaptive
clock algorithm
Transmit clock generation of this port is based on the SRTS
algorithm.
Transmit clock generation of this port is based on both
algorithms. The tuning range of PLL-ACM can not be reduced
(tur), because PLL-ACM has to accept the jitter passed through
or generated in PLL-SRTS.
Data Sheet
205
2003-01-20