PXB4219E Datasheet, PDF (119/290 Pages) Infineon Technologies AG – Interworking Element for 8 E1/T1 Lines

IWE8, V3.4
PXB 4219E, PXB 4220E, PXB 4221E
Memory Structure
6
Memory Structure
The IWE8 occupies an address space of 256k x 16 bits. The lower 128k x 16 bits are
used for internal registers and internal configuration RAM’s. The upper 128k x 16 bits are
used to address external RAM.
MPADR[17:0]
3FFFF_H
128k × 16
64k × 32
RMADR[15:0]
FFFF_H
External RAM
20000_H
1FFFF_H
00A00_H
009FF_H
00800_H
007FF_H
00600_H
005FF_H
00400_H
003FF_H
00200_H
001FF_H
00000_H
Not used
512 × 16
256 × 32
Internal RAM4
512 × 16
256 × 32
Internal RAM3
512 × 16
256 × 32
Internal RAM2
512 × 16
256 × 32
Internal RAM1
512 × 16
Internal Registers
0000_H
Figure 36 Memory Model
The 4 internal configuration RAMs are organized as 256 x 32 bit memories, but RAM4
has only 16 bits implemented (bit positions 16 to 31 are always read as "0").
Data Sheet
119
2003-01-20