PXB4219E Datasheet, PDF (258/290 Pages) Infineon Technologies AG – Interworking Element for 8 E1/T1 Lines

IWE8, V3.4
PXB 4219E, PXB 4220E, PXB 4221E
Electrical Characteristics
Table 42 Transmit Timing (8-Bit Data Bus, 33 MHz, Single PHY)
No. Signal Name DIR Description
Limit Values
Min
Max
t1 TXCLK¹⁾
A>P TXCLK frequency (nominal) 0
33
tT2
TXCLK duty cycle
40
60
tT3
TXCLK peak-to-peak jitter -
5
tT4
TXCLK rise/fall time
-
3
tT5 TXDAT[7:0], A>P Input setup to TXCLK
8
-
tT6 ^TXPTY,
TXSOC,
Input hold from TXCLK
1
-
TXENB
tT7 TXCLAV
A<P Input setup to TXCLK
8
-
tT8
Input hold from TXCLK
1
-
1) _{The frequency should be equal or smaller than the coreclock CLOCK}
Unit
MHz
%
%
ns
ns
ns
ns
ns
Table 43 Receive Timing (8-Bit Data Bus, 33 MHz, Single PHY)
No. Signal Name DIR Description
Limit Values
Min
Max
t1 RXCLK¹⁾
A>P RXCLK frequency (nominal) 0
33
tT2
RXCLK duty cycle
40
60
tT3
RXCLK peak-to-peak jitter -
5
tT4
RXCLK rise/fall time
-
3
tT5 RXENB
A>P Input setup to RXCLK
8
-
tT6
Input hold from RXCLK
1
-
tT7 RXDAT[7:0], A<P Input setup to RXCLK
8
-
tT8 ^RXPTY,
RXSOC,
Input hold from RXCLK
1
-
RXCLAV
1) _{The frequency should be equal or smaller than the coreclock CLOCK}
Unit
MHz
%
%
ns
ns
ns
ns
ns
Data Sheet
258
2003-01-20