PXB4219E Datasheet, PDF (138/290 Pages) Infineon Technologies AG – Interworking Element for 8 E1/T1 Lines

IWE8, V3.4
PXB 4219E, PXB 4220E, PXB 4221E
Memory Structure
Table 30 Statistics Counters for ATM Ports ¹⁾
counter_nr
0 ²⁾
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Counter contents
Number of discarded cells due to output queue, ATM Receive Buffer
overflow
Number of received cells with correctable HEC errors
Number of received cells with non-correctable HEC errors
Number of times cell delineation SYNC state is left, except when forced
by the processor
Number of discarded cells due to ATM transmit buffer overflow
Number of cells which have been discarded because of CLP or CLPI
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
1) _{For ATM ports, the counters are located in channel_nr = 00000B}
2) _{Counter_nr 0 is common to all ports and is located in port_nr = 111B channel_nr = 11111B}
Table 31 Statistics Counters for AAL Ports¹⁾
Counter_nr
0 ²⁾
1
2
3
Counter contents
Number of discarded cells due to Output Queue or Segmentation Buffer
overflow
Not used
Number of cells written to the Reassembly Buffer. It excludes cells that
were discarded for any reason and cells that are inserted instead of lost
cells (atmfReassembledCells)
Number of times incoming MFB pulse is not synchronous to SDT start of
structure upstream (AAL1)
Data Sheet
138
2003-01-20