PXB4219E Datasheet, PDF (82/290 Pages) Infineon Technologies AG – Interworking Element for 8 E1/T1 Lines

IWE8, V3.4
PXB 4219E, PXB 4220E, PXB 4221E
Operational Description
4.8.3 Serial Loop
The framer transmit clock, data, framesync and multi-framesync signals can be looped
from the Framer Transmit Interface to the Framer Receive Interface per port. This
feature can be enabled by setting the “p_slp” bit in the Port Configuration Register (pcfN,
see Chapter 7.1).
The loopback can be made transparent or non-transparent by setting the “tslp” bit in the
Loopback Control Register (lpbc, Chapter 7.11). If the loopback is made transparent, all
transmitted data is also visible on FTDAT. Otherwise, if non-transparent, all 1s are
transmitted on FTDAT.
Data Sheet
82
2003-01-20