PXB4219E Datasheet, PDF (77/290 Pages) Infineon Technologies AG – Interworking Element for 8 E1/T1 Lines

IWE8, V3.4
PXB 4219E, PXB 4220E, PXB 4221E
Operational Description
f/f₀
dl
dl: low damping
dh: high damping
do: optimized damping
do
1
dh
0.1
Figure 21
Tr(dl) Tr(do) = Tl(do)
Influence of Damping on Lock in Time
Tr(dh) = Tl(dh) t
ACM Edge response
PLL-ACM tries to keep the number of bytes in the Reassembly Buffer at the average
buffer filling value programmed to register “avbN”. This value should be equivalent to the
number of bytes stored in the Reassembly Buffer during start-up, as defined by the value
programmed in the “starv_ini” field of the “AAL Transmit Reference Slot” in RAM3.
During start-up and restart, PLL-ACM will be free running for 8 x tiniN[tini] x T_Data as
programmed in the Time of Initial Free Run Register (“tiniN”, see Chapter 7.54). During
this time the data buffer is filled with an initial number of bytes. As tiniN[tini] is 2 bit longer
than “stav_ini” in the AAL Transmit Reference Slot of RAM3 it is possible to choose a
longer-than-necessary initialization time, to compensate start-up time differences.
After the initial free run, PLL-ACM will start locking in. The lock in time depends on:
• The difference between the initial number of bytes in the data buffer (see “starv_ini” of
the “AAL Transmit Reference Slot” in RAM3) and the value programmed in register
“avbN”.
• The damping, which is influenced by register “asfN”.
• The maximum allowed frequency deviation given by “tur” of register “condN”.
• The required frequency deviation.
Data Sheet
77
2003-01-20