PXB4219E Datasheet, PDF (248/290 Pages) Infineon Technologies AG – Interworking Element for 8 E1/T1 Lines

IWE8, V3.4
PXB 4219E, PXB 4220E, PXB 4221E
Electrical Characteristics
Table 34 Clock and Reset Interface AC Timing Characteristics (cont’d)
No. Parameter
Limit Values
Unit
1A
F_CLOCK: Frequency CLOCK¹⁾
GIM T1:
Min
Typ
18,53 25
Max
38,88 MHz
others:
24,58 25
38,88 MHz
2
T_CLK52: Period CLK52²⁾
2A
F_CLK52: Frequency CLK52 ²⁾
-50 ppm 19.29
-50 ppm 51.84
+50 ppm ns
+50 ppm MHz
3
Pulse width RESET low
3xT_CLOCK
1) _{The frequency should be equal or higher than RXCLK and TXCLK of the UTOPIA interface}
2) _{Only required if the Internal Clock Recovery Circuit is used for SRTS}
9.6.2 Framer Interface
9.6.2.1 Framer Interface in FAM
Framer Receive Interface
1
RFCLK
2
FRCLK
3
3
FRFRS
4
5
FRDAT
6
7
FRMFB
Figure 57 Framer Receive Interface Timing in FAM
FRITFAM
Data Sheet
248
2003-01-20