PXB4219E Datasheet, PDF (281/290 Pages) Infineon Technologies AG – Interworking Element for 8 E1/T1 Lines

IWE8, V3.4
PXB 4219E, PXB 4220E, PXB 4221E
Appendix
12.4
Channel Associated Signalling
ITU-T recommendation G.704 [24] defines Channel Associated Signalling (CAS) for
interfaces at 2048 kbit/s (E1) and 1544 kbit/s (DS1) interfaces carrying 64 kbit/s
channels. The mapping of E1 or DS1 multiframes containing CAS into ATM cells is
defined in the ATM-Forum “Circuit Emulation Services Specification” [10].
In case of E1 and DS1 circuit emulation, the user information carried via AAL1 consists
of a stream of payload substructures followed by an optional signalling substructure.
Each payload and signalling substructure corresponds to one E1 multiframe / DS1
extended superframe. The payload substructure contains the channel slots and the
optional signalling substructure contains the signalling bits associated with the channels.
The following section gives an overview on this topic.
12.4.1 E1
An E1 multiframe comprises 16 consecutive frames. These are numbered from 0 to15.
The multiframe alignement signal is 0000 and occupies digit time slots 1 to 4 of 64 kbit/
s channel time slot 16 in frame 0.
When 64 kbit/s channel time slot 16 is used for channel-associated signalling, the 64
kbit/s capacity is sub-multiplexed into lower-rate signalling channels using the
multiframe alignement signal as a reference.
Details of the bit allocation are given in Table 54
Table 54 Bit allocation of E1 time slot 16 for CAS
E1 Multiframe
Bit allocation of time slot 16
Frame 0 (CasBeginFrame)
0000
xyxx
Frame 1
abcd channel 1 abcd channel 16
Frame 2
abcd channel 2 abcd channel 17
...
...
...
Frame 15
abcd channel 15 abcd channel 30
x = spare bit, to be set to 1 if not used
y = Bit used for alarm indication to the remote end. In undisturbed operation, set to 0; in alarm condition, set to 1.
Data Sheet
281
2003-01-20