PXB4219E Datasheet, PDF (200/290 Pages) Infineon Technologies AG – Interworking Element for 8 E1/T1 Lines

IWE8, V3.4
PXB 4219E, PXB 4220E, PXB 4221E
Register Description
7.44
Interrupt Source Register (irs)
Read only Address 00101_H
Reset value: 0000_H
15
8
Not used
irs7
irs6
irs5
7
0
irs4
irs3
irs2
irs1
irs0
crifo
scri
per
irsN
crifo
scri
per
IRS register of port N
These bits indicate if a bit is set in irsN
0 = False
1 = True
Clock recovery interface FIFO overflow
This bit indicates if a bit is set in crifo
0 = False
1 = True
Synchronization errors at the internal clock recovery interface
This bit indicates if a bit is set in scri
0 = False
1 = True
Parity errors at the clock recovery interface.
This bit indicates if a bit is set in per
0 = False
1 = True
Bits are reset after reading the corresponding registers.
Data Sheet
200
2003-01-20