PXB4219E Datasheet, PDF (23/290 Pages) Infineon Technologies AG – Interworking Element for 8 E1/T1 Lines

IWE8, V3.4
PXB 4219E, PXB 4220E, PXB 4221E
Pin Descriptions
2.2
Pin Definitions and Functions
Output Pull Up and Pull Down Type Definitions
PUx
Pull Up of strength x (x = A, B) is implemented. The
corresponding current is specified in Chapter 9.4
PDx
Pull Down of strength x (x = A) is implemented. The
corresponding current is specified in Chapter 9.4
Tri
Tri-stated when inactive
2.2.1 Generic Framer Interface
Table 1
Generic Framer Interface (73 pins)
Pin No. Symbol
Input (I) Function
Output (O)
C5, A6, B9, FRCLK[7:0] I
A12, C14,
A18, C19,
G17
Framer Receive Clock
Receive clock for the framer interface
B4, C7, C9,
B11, B14,
A17, B20,
F18
FRDAT[7:0]
I
PDA
Framer Receive Data
Receive data input of the framer interface
A3, B6, D9,
C11, A14,
C16, C18,
E19
FRMFB[7:0]
I
PUA
Framer Receive Multiframe Begin
Indication that a new multi-/superframe is
available on the receive side of the framer
interface
B3, A5, A8,
A10, B13,
A16, A19,
E18
FRFRS[7:0]
O
PUA
Framer Receive Frame Synchronization
Pulse
Indication that a new frame is available on
the receive side of the framer interface
A4,B7, A9,
B12, A15,
D16, D18,
E20
FRLOS[7:0]
I
PDA
Framer Receive Loss of Signalling
Indication that CAS bits are invalid, IWE8
will start CAS freezing
Data Sheet
23
2003-01-20