C5ENPB0-DS Datasheet, PDF (98/118 Pages) Freescale Semiconductor, Inc – C-5e Network Processor Silicon Revision B0

98
CHAPTER 3: ELECTRICAL SPECIFICATIONS
Table 52 Fabric Processor Timing Description
SYMBOL
Tfrc
Tfrcs
PARAMETER
FRX Cycle Time
FRXCTL Setup
Tfrch FRXCTL Hold
Tfrco FRXCTL Output
Tfrcz FRXCTL Clk to Tri*
Tfrcv FRXCTL Clk to Driven*
Tfrds FIN Setup
Tfrdh
Tftc
Tftcs
FIN Hold
FTX Cycle Time
FTXCTL Setup
Tftch
Tftco
Tftcz
Tftcv
Tftdo
FTXCTL Hold
FTXCTL Output
FTXCTL Clk to Tri*
FTXCTL Tri to Driven*
FOUT Output
MIN TYP
8.0
4.0
1.5
0.0
1.0
1.0
1.0
4.0
1.5
0.0
8.0
4.0
1.5
0.0
1.0
1.0
1.0
1.0
* _{Not fully tested, values based on design/characterization.}
MAX UNIT COMMENT
ns
ns
Utopia2 Mode
All other modes
ns
4.0 ns
4.0 ns
4.0 ns
ns
Utopia2 Mode
All other modes
ns
ns
ns
Utopia2 Mode
All other modes
ns
4.0 ns
4.0 ns
4.0 ns
4.0 ns
C5ENPB0-DS REV 08
FREESCALE SEMICONDUCTOR