C5ENPB0-DS Datasheet, PDF (115/118 Pages) Freescale Semiconductor, Inc – C-5e Network Processor Silicon Revision B0

M
MDIO Serial Interface Timing Description 94
MDIO Serial Interface Timing Diagram 94
MDIO Serial Interface Timing Specifications 94
Measurements
C-5e Network Processor 109
Mechanical Specifications 107
Miscellaneous Test Signals for JTAG, Scan, and Internal Test
Routines 60
N
No Connection Pins 61
O
OC-12 Signals 42
OC-12 Timing Description 91
OC-12 Timing Specifications 91
OC-3 Signals 41
OC-3 Timing Description 89
OC-3 Timing Diagram 89
OC-3 Timing Specifications 89
Operating Conditions, Recommended 76
P
Package Measurements 109
PCI Signals 43
PCI Timing Description 93
PCI Timing Diagram 92
PCI Timing Specifications 92
Pin Descriptions
Grouped by Function 32
Pin Locations 30
Pin Number Signals Groups 61
Pinout Diagram 30
Power Sequencing 78, 79
Power Supply Signals 59
Power X(CSIX-L0) Mode, Fabric Interface Pin Mapping 52
PRIZMA Mode, C-5e Network Processor to Fabric Interface Pin
Mapping 51
Processor, Executive 25
Processor, Fabric 26
FREESCALE SEMICONDUCTOR
INDEX 115
PROM Interface Diagram 46
PROM Interface Signals 45
PROM Interface Timing Description 96
PROM Interface Timing Diagram 96
PROM Interface Timing Outline 48
PROM Interface Timing Specifications 96
Q
QMU External Mode Interface Signals 58
QMU External Mode Timing Diagram 104
QMU Signal Groups 103
QMU SRAM (Internal Mode) Interface Signals 57
QMU SRAM (Internal Mode) Timing Diagram 102
QMU Timing Description 102
QMU Timing Specifications 102
Queue Management Unit 28
R
Recommended Operating Conditions 76
Register
IDcode 73
JTAG Instruction 73
S
Serial Interface Signals 44
Serial Port Signals 45
Signal
General System Interface 48
Signal Descriptions 29
Signal Summary 29
Signals
10/100 Ethernet 36
BMU SDRAM Interface 54
Channel Processor Interface 34
Clock 33
Clock and Reference 33
DS1/T1 Framer Interface 36
Fabric Processor Interface 49
Grouped by Pin Number 61
OC-12 42
OC-3 41
PCI 43
C5ENPB0-DS REV 08