C5ENPB0-DS Datasheet, PDF (113/118 Pages) Freescale Semiconductor, Inc – C-5e Network Processor Silicon Revision B0

INDEX
C5ENPB0-DS
Rev 08
Symbols
10/100 Ethernet (RMII) Configuration 36
10/100 Ethernet Signals 36
10/100 Ethernet Timing Description 86
10/100 Ethernet Timing Diagram 86
10/100 Ethernet Timing Specifications 86
A
Absolute Maximum Ratings 75
AC Timing Specifications 83
B
Block Diagram, C-5e Network Processor 22
BMU SDRAM Interface Signals 54
BMU Signal Groups 100
BMU Timing Description 99
BMU Timing Diagram 99
BMU Timing Specifications 99
Boundary Scan Cell Types 71
Boundary Scan Description Language 74
Bringup Clock Timing Diagram 78
Buffer Management Unit 26
C
C-5e Network Processor Absolute Maximum Ratings 75
C-5e Network Processor BGA Package, Bottom View 108
C-5e Network Processor BGA Package, Side View 107
C-5e Network Processor Capacitance Data 77
C-5e Network Processor DC Characteristics 77
C-5e Network Processor Power and Thermal Characteristics 79
C-5e NP Channel Processors 24
Channel Processor Interface Signals 34
FREESCALE SEMICONDUCTOR
Channel Processors 24
Channel Processors Physical Interface Signals and Pins
Grouped by Clusters 35
Clock and Reference Signals 33
Clock Signals 33
Clock Timing Specifications 84
Configuration
10/100 Ethernet (RMII) 36
DS1/T1 Framer Interface 36
FibreChannel TBI 39
Gigabit Ethernet 39
Gigabit Ethernet (GMII) 37
SONET OC-12 Transceiver Interface 41
SONET OC-3 Transceiver Interface 41
Configurations
GMII/TBI Transmit and Receive Pin 38
CP Timing Specifications 85
CSIX-L1 Mode, C-5e Network Processor to Fabric Interface Pin
Mapping 53
D
Data Registers
JTAG 71
DC Characteristics 77
Description
Functional 21
Description Language
Boundary Scan 74
Descriptions
Signal 29
Diagram
10/100 Ethernet Timing 86
BMU Timing 99
Bringup Clock Timing 78
DS1/DS3 Ethernet Timing 85
C5ENPB0-DS REV 08