C5ENPB0-DS Datasheet, PDF (58/118 Pages) Freescale Semiconductor, Inc – C-5e Network Processor Silicon Revision B0

58
CHAPTER 2: SIGNAL DESCRIPTIONS
QMU (External Mode) The QMU External Mode signals are described in Table 28.
Interface Signals
Table 28 QMU (External Mode) Interface Signals
SIGNAL NAME
QA0 - QA15
QA16
QD0 - QD23
QD24 - QD31
QDQPAR
QARDY
QNQRDY
QWEX
QBCLKO
QBCLKI
QACLKO
QACLKI
QDPL
QDPH
TOTAL PINS
PIN #
TOTAL TYPE I/O
C8, B8, A8, F9, E9, D9, C9, B9, A9, F10, D10, 16
C10, A10, G11, F11, E11
LVTTL O
D11
1
LVTTL O
G1, F1, E1, D1, C1, B1, G2, F2, D2, C2, A2, G3, 24
E3, D3, B3, A3, G4, F4, E4, D4, C4, B4, A4, G5
LVTTL I_PD
F5, E5, D5, C5, B5, A5, F6, D6
C11
E8
D8
C6
8
LVTTL I_PD
1
LVTTL I_PD
1
LVTTL I_PD
1
LVTTL I_PD
1
LVTTL O
A6
1
LVTTL O
E7
1
LVTTL I_PD
D7
1
LVTTL O
B7
1
LVTTL I_PD
A7
1
LVTTL O
F8
1
LVTTL O
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SIGNAL DESCRIPTION
Enqueue Data [8:23]
Enqueue Parity
Dequeue Data [0:23]
Enqueue Data [0:7]
Dequeue Parity
Dequeue Ack Ready
Enqueue Ready
Dequeue Ready
Output ClockB
Input ClockB
Output ClockA
Input ClockA
Dequeue Ack [0]
Dequeue Ack [1]
Although the C-5e NP provides an external mode, it does not support an external traffic
manager device.
C5ENPB0-DS REV 08
FREESCALE SEMICONDUCTOR