C5ENPB0-DS Datasheet, PDF (97/118 Pages) Freescale Semiconductor, Inc – C-5e Network Processor Silicon Revision B0

AC Timing Specifications
97
Fabric Processor Timing The FP timing specifications are shown in Figure 23 and described in Table 52.
Specifications
Figure 23 Fabric Processor Timing Diagram
Cycle 1
Cycle 2
Cycle 3
Cycle 4
Cycle 5
FRXCLK
FRXCTL
(output)
T_frco
FRXCTL
(input)
FINn
T_frc
T_frcz
T_frcv
T_frcs T_frch
T_frds T_frdh
FTXCLK
FTXCTL
(output)
T_ftco
FTXCTL
(input)
FOUTn
T_ftc
T_ftcz
T_ftcv
T_ftdo
T_ftcs T_ftch
FREESCALE SEMICONDUCTOR
C5ENPB0-DS REV 08