English
Language : 

MC68HC08AS20 Datasheet, PDF (46/386 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers
Addr.
$0023
$0024
$0025
$0026
$0027
$0028
$0029
$002A
$002B
$002C
$002D
Register Name
Read:
TIM Counter Register Low
(TCNTL)
Write:
Reset:
Read:
TIM Modulo Register High
(TMODH)
Write:
Reset:
Read:
TIM Modulo Register Low
(TMODL)
Write:
Reset:
Read:
TIM Channel 0 Status and
Control Register (TSC0)
Write:
Reset:
Read:
TIM Channel 0 Register High
(TCH0H)
Write:
Reset:
Read:
TIM Channel 0 Register Low
(TCH0L)
Write:
Reset:
Read:
TIM Channel 1 Status and
Control Register (TSC1)
Write:
Reset:
Read:
TIM Channel 1 Register High
(TCH1H)
Write:
Reset:
Read:
TIM Channel 1 Register Low
(TCH1L)
Write:
Reset:
Read:
TIM Channel 2 Status and
Control Register (TSC2)
Write:
Reset:
Read:
TIM Channel 2 Register High
(TCH2H)
Write:
Reset:
Bit 7
Bit 7
0
Bit 15
1
Bit 7
1
CH0F
0
0
Bit 15
Bit 7
CH1F
0
0
Bit 15
Bit 7
CH2F
0
0
Bit 15
6
5
4
3
2
1
Bit 0
6
5
4
3
2
1
Bit 0
0
0
0
0
0
0
0
14
13
12
11
10
9
Bit 8
1
1
1
1
1
1
1
6
5
4
3
2
1
Bit 0
1
1
1
1
1
1
1
CH0IE MS0B MS0A ELS0B ELS0A TOV0 CH0MAX
0
0
0
0
0
0
0
14
13
12
11
10
9
Bit 8
Indeterminate after Reset
6
5
4
3
2
1
Bit 0
CH1IE
Indeterminate after Reset
0
MS1A ELS1B ELS1A
TOV1 CH1MAX
0
0
0
0
0
0
0
14
13
12
11
10
9
Bit 8
Indeterminate after Reset
6
5
4
3
2
1
Bit 0
Indeterminate after Reset
CH2IE MS2B MS2A ELS2B ELS2A TOV2 CH2MAX
0
0
0
0
0
0
0
14
13
12
11
10
9
Bit 8
Indeterminate after Reset
= Unimplemented
R = Reserved
U = Unaffected
X = Indeterminate
Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 7)
Advance Information
46
MC68HC08AS20 —Rev. 4.1
Freescale Semiconductor