MC68HC08AS20 Datasheet, PDF (182/386 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

When bit DDRAx is a logic 1, reading address $0000 reads the PTAx
data latch. When bit DDRAx is a logic 0, reading address $0000 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 15-2 summarizes
the operation of the port A pins.
Table 15-2. Port A Pin Functions
DDRA
Bit
0
PTA
Bit
X
I/O Pin
Mode
Input, Hi-Z
Accesses
to DDRA
Read/Write
DDRA[7:0]
Accesses to PTA
Read
Pin
Write
PTA[7:0]⁽¹⁾
1
X
Output
DDRA[7:0] PTA[7:0]
PTA[7:0]
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
Advance Information
182
MC68HC08AS20 —Rev. 4.1
Freescale Semiconductor