MC68HC08AS20 Datasheet, PDF (145/386 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

10.7.2 Stop Mode
When the LVIPWRD bit in the MOR register is programmed to logic 0
and the LVISTOP bit in the LVISR register is at logic 1, the LVI module
remains active after a STOP instruction.
NOTE: If the LVIPWRD bit is at logic 0, the LVISTOP bit must be at logic 0 to
meet the minimum stop mode I_DD specification.
MC68HC08AS20 — Rev. 4.1
Freescale Semiconductor
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