MC68HC08AS20 Datasheet, PDF (118/386 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

9.8 SIM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
9.8.1 SIM Break Status Register . . . . . . . . . . . . . . . . . . . . . . . . 136
9.8.2 SIM Reset Status Register . . . . . . . . . . . . . . . . . . . . . . . . 138
9.8.3 SIM Break Flag Control Register. . . . . . . . . . . . . . . . . . . .139
9.2 Introduction
This section describes the system integration module (SIM), which
supports up to 24 external and/or internal interrupts. The SIM is a system
state controller that coordinates CPU and exception timing. Together
with the central processor unit (CPU), the SIM controls all MCU
activities. A block diagram of the SIM is shown in Figure 9-1. Table 9-1
is a summary of the SIM input/output (I/O) registers.
The SIM is responsible for:
• Bus clock generation and control for CPU and peripherals
– Stop/wait/reset/break entry and recovery
– Internal clock control
• Master reset control, including power-on reset (POR) and
computer operating properly (COP) timeout
• Interrupt control
– Acknowledge timing
– Arbitration control timing
– Vector address generation
• CPU enable/disable timing
• Modular architecture expandable to 128 interrupt sources
Advance Information
118
MC68HC08AS20 —Rev. 4.1
Freescale Semiconductor