MC68HC08AS20 Datasheet, PDF (321/386 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

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Table 20-1. BDLC Input/Output (I/O) Register Summary
Name
Bit 7
6
5
BDLC Analog and Roundtrip ^Read:
Delay Register (BARD) _Write:
ATE
RXPOL
0
Reset: 1
1
0
4
3
2
1
Bit 0
0
BO3 BO2 BO1 BO0
0
0
1
1
1
BDLC Control Register 1 ^Read:
(BCR1) _Write:
IMSG
CLKS
R1
R0
0
R
0
R
IE
WCM
Reset: 1
1
1
0
0
0
0
0
BDLC Control Register 2
(BCR2)
Read:
Write:
ALOOP
DLOOP
RX4XE
Reset: 1
1
0
NBFS
0
TEOD TSIFR TMIFR1 TMIFR0
0
0
0
0
BDLC State Vector Register ^{Read: 0}
0
I3
I2
I1
I0
0
0
(BSVR) _Write:
Reset: 0
0
0
0
0
0
0
0
Read:
BDLC Data Register (BDR)
BD7 BD6 BD5
BD4
BD3 BD2 BD1 BD0
Write:
Reset:
Indeterminate after Reset
= Unimplemented
R = Reserved
MC68HC08AS20 — Rev. 4.1
Freescale Semiconductor
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