MC68HC08AS20 Datasheet, PDF (328/386 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

20.5.2 J1850 Frame Format
All messages transmitted on the J1850 bus are structured using the
format shown in Figure 20-5.
J1850 states that each message has a maximum length of 101 PWM bit
times or 12 VPW bytes, excluding SOF, EOD, NB, and EOF, with each
byte transmitted most significant bit (MSB) first.
All VPW symbol lengths in the following descriptions are typical values
at a 10.4-kbps bit rate.
SOF — Start-of-Frame Symbol
All messages transmitted onto the J1850 bus must begin with a
long-active 200 µs period SOF symbol. This indicates the start of a
new message transmission. The SOF symbol is not used in the CRC
calculation.
Data — In-Message Data Bytes
The data bytes contained in the message include the message
priority/type, message ID byte (typically the physical address of the
responder), and any actual data being transmitted to the receiving
node. The message format used by the BDLC is similar to the 3-byte
consolidated header message format outlined by the SAE J1850
document. See SAE J1850 Class B Data Communications Network
Interface for more information about 1- and 3-byte headers.
Messages transmitted by the BDLC onto the J1850 bus must contain
at least one data byte, and, therefore, can be as short as one data
byte and one CRC byte. Each data byte in the message is eight bits
in length and is transmitted MSB to LSB (least significant bit).
IDLE
SOF
DATA
PRIORITY
(DATA0)
MESSAGE ID
(DATA1)
DATA_N
E
OPTIONAL
CRC
O
D
N
B
IFR
Figure 20-5. J1850 Bus Message Format (VPW)
I
F
EOF _S IDLE
Advance Information
328
MC68HC08AS20 —Rev. 4.1
Freescale Semiconductor