MC68HC08AS20 Datasheet, PDF (238/386 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

17.4.4 Character Transmission
During an SCI transmission, the transmit shift register shifts a character
out to the PTE0/TxD pin. The SCI data register (SCDR) is the write-only
buffer between the internal data bus and the transmit shift register. To
initiate an SCI transmission:
1. Initialize the Tx and Rx rate in the SCI baud register (SCBR)
($0019) see 17.9.7 SCI Baud Rate Register.
2. Enable the SCI by writing a logic 1 to ENSCI in SCI control register
1 (SCC1) ($0013).
3. Enable the transmitter by writing a logic 1 to the transmitter enable
bit (TE) in SCI control register 2 (SCC2) ($0014).
4. Clear the SCI transmitter empty bit (SCTE) by first reading SCI
status register (SCS1) ($0016) and then writing to the SCDR
($0018).
5. Repeat step 3 for each subsequent transmission.
At the start of a transmission, transmitter control logic automatically
loads the transmit shift register with a preamble of 10 or 11 logic 1s. After
the preamble shifts out, control logic transfers the SCDR data into the
transmit shift register. A logic 0 start bit automatically goes into the least
significant bit position of the transmit shift register. A logic 1 stop bit goes
into the most significant bit position.
The SCI transmitter empty bit, SCTE in the SCI status control register
(SCS1), becomes set when the SCDR transfers a byte to the transmit
shift register. The SCTE bit indicates that the SCDR can accept new
data from the internal data bus. If the SCI transmit interrupt enable bit,
SCTI E (SCC2), is also set, the SCTE bit generates a transmitter CPU
interrupt request.
When the transmit shift register is not transmitting a character, the
PTE0/TxD pin goes to the idle condition, logic 1. If at any time software
clears the ENSCI bit in SCI control register 1 (SCC1), the transmitter and
receiver relinquish control of the port E pins.
Advance Information
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MC68HC08AS20 —Rev. 4.1
Freescale Semiconductor