MC68HC08AS20 Datasheet, PDF (168/386 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

13.8 Low-Power Modes
The following subsections describe the low-power modes.
13.8.1 Wait Mode
The COP continues to operate during wait mode. To prevent a COP
reset during wait mode, periodically clear the COP counter in a CPU
interrupt routine.
NOTE: If the COP is enabled in wait mode, it must be periodically refreshed.
13.8.2 Stop Mode
Stop mode turns off the CGMXCLK input to the COP and clears the SIM
counter. Service the COP immediately before entering or after exiting
stop mode to ensure a full COP timeout period after entering or exiting
stop mode.
The STOP bit in the MOR register ($001F) (see Section 5. Mask
Options) enables the STOP instruction. To prevent inadvertently turning
off the COP with a STOP instruction, disable the STOP instruction by
programming the STOP bit to logic 0.
13.9 COP Module During Break Interrupts
The COP is disabled during a break interrupt when V_DD + V_HI (see 21.5
5.0 Volt DC Electrical Characteristics) is present on the RST pin.
Advance Information
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MC68HC08AS20 —Rev. 4.1
Freescale Semiconductor