MC68HC08AS20 Datasheet, PDF (123/386 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

9.4.1 External Pin Reset
Pulling the asynchronous RST pin low halts all processing. The PIN bit
of the SIM reset status register (SRSR) is set as long as RST is held low
for a minimum of 67 CGMXCLK cycles, assuming that neither the POR
nor the LVI was the source of the reset. See Table 9-3 for details. Figure
9-3 shows the relative timing.
Table 9-3. PIN Bit Set Timing
Reset Type
POR/LVI
All Others
Number of Cycles Required to Set PIN
4163 (4096 + 64 + 3)
67 (64 + 3)
CGMOUT
RST
IAB
PC
VECT H VECT L
Figure 9-3. External Reset Timing
MC68HC08AS20 — Rev. 4.1
Freescale Semiconductor
Advance Information
123