MC68HC08AS20 Datasheet, PDF (136/386 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

9.8 SIM Registers
The SIM has three memory mapped registers.
9.8.1 SIM Break Status Register
The SIM break status register contains a flag to indicate that a break
caused an exit from stop mode or wait mode.
Address: $FE00
Bit 7
6
5
4
3
2
1
Bit 0
Read:
R
R
R
R
R
R
SBSW
R
Write:
Reset:
0
R = Reserved
Figure 9-16. SIM Break Status Register (SBSR)
SBSW — SIM Break Stop/Wait Bit
This status bit is useful in applications requiring a return to wait mode
or stop mode after exiting from a break interrupt. Clear SBSW by
writing a logic 0 to it. Reset clears SBSW.
1 = Stop mode or wait mode exited by break interrupt
0 = Stop mode or wait mode not exited by break interrupt
Advance Information
136
MC68HC08AS20 —Rev. 4.1
Freescale Semiconductor