CS43130 Datasheet, PDF (95/137 Pages) Cirrus Logic – 130-dB, 32-Bit High-Performance DAC with Integrated Headphone Driver

CS43130
7 Register Descriptions
7 Register Descriptions
All registers are read/write, except for the device’s ID, revision, and status registers, which are read only. The following
tables describe bit assignments. The default state of each bit after a power-up sequence or reset is listed in each bit
description. All reserved bits must maintain their default state.
7.1 Global Registers
7.1.1
R/O
Default
Device ID A and B
7
6
5
DEVIDA
0
1
0
Bits
Name
7:4 DEVIDA Part number first digit: 4
3:0 DEVIDB Part number second digit: 3
4
3
0
0
Description
2
1
DEVIDB
0
1
7.1.2 Device ID C and D
R/O
7
6
5
4
3
2
1
DEVIDC
DEVIDD
Default
0
0
0
1
0
0
1
Bits
Name
7:4 DEVIDC Part number third digit: 1
3:0 DEVIDD Part number fourth digit: 3
Description
7.1.3 Device ID E
R/O
7
6
5
4
3
2
1
DEVIDE
—
Default
0
0
0
0
0
0
0
Bits
Name
7:4 DEVIDE Part number fifth digit: 0
3:0
—
Reserved
Description
7.1.4 Revision ID
R/O
7
6
5
4
3
2
1
AREVID
MTLREVID
Default
x
x
x
x
x
x
x
Bits
Name
Description
7:4 AREVID Alpha revision. AREVID and MTLREVID form the complete device revision ID (e.g., A0, B2).
3:0 MTLREVID Metal revision. AREVID and MTLREVID form the complete device revision ID (e.g., A0, B2).
7.1.5 Subrevision ID
R/O
7
6
5
4
3
2
1
SUBREVID
Default
x
x
x
x
x
x
x
Bits
Name
7:0 SUBREVID Subrevision level.
Description
Address 0x10000
0
1
Address 0x10001
0
1
Address 0x10002
0
0
Address 0x10004
0
x
Address 0x10005
0
x
DS1073F1
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