CS43130 Datasheet, PDF (45/137 Pages) Cirrus Logic – 130-dB, 32-Bit High-Performance DAC with Integrated Headphone Driver

CS43130
4.9 Audio Serial Port (ASP)
As shown in Fig. 4-23, if Serial Port 50/50 Mode is enabled (xSP_5050 = 1), the LRCK high duration must be programmed
to the LRCK period divided by two (rounded down to the nearest integer when the LRCK period is odd). When the serial
port is in 50/50 Mode, setting the LRCK high duration to a value other than half of the period results in erroneous operation.
LRCK
SCLK
Falling
Edge
Rising
Edge
xSP _LCHI
...
...
...
xSP_LCPR
...
...
...
Even xSP _LCPR
LRCK
SCLK
Falling
Edge
Rising
Edge
xSP _LCHI
...
...
...
xSP_LCPR
xSP _LCHI
...
...
...
Odd xSP _LCPR
xSP_LCPR count clock is absent
Figure 4-23. xSP_LRCK Period, High Width, 50/50 Mode
DS1073F1
45