CS43130 Datasheet, PDF (73/137 Pages) Cirrus Logic – 130-dB, 32-Bit High-Performance DAC with Integrated Headphone Driver

Example 5-15. Switching from Analog-In to PCM Playback (Cont.)
STEP
TASK
REGISTER/BIT FIELDS
9 Set ASP sample bit size. XSP is Serial Port Sample Bit Size. 0x1000C
don't care
Reserved
XSP_SPSIZE
ASP_SPSIZE
10 Set ASP numerator
ASP Numerator 1. 0x40010
ASP_N_LSB
ASP Numerator 2. 0x40011
ASP_N_MSB
11 Set ASP denominator
ASP Denominator 1. 0x40012
ASP_M_LSB
ASP Denominator 2. 0x40013
ASP_M_MSB
12 Set ASP LRCK high time
ASP LRCK High Time 1. 0x40014
ASP_LCHI_LSB
ASP LRCK High Time 2. 0x40015
ASP_LCHI_MSB
13 Set ASP LRCK period
ASP LRCK Period 1. 0x40016
ASP_LCPR_LSB
ASP LRCK Period 2. 0x40017
ASP_LCPR_MSB
14 Configure ASP clock
ASP Clock Configuration. 0x40018
Reserved
ASP_M/SB
ASP_SCPOL_OUT
ASP_SCPOL_IN
ASP_LCPOL_OUT
ASP_LCPOL_IN
15 Configure ASP frame
ASP Frame Configuration. 0x40019
Reserved
ASP_STP
ASP_5050
ASP_FSD
16 Set ASP channel location
ASP Channel 1 Location. 0x50000
ASP_RX_CH1
ASP Channel 2 Location. 0x50001
ASP_RX_CH2
17 Set ASP channel size and enableASP Channel 1 Size and Enable.
0x5000A
Reserved
ASP_RX_CH1_AP
ASP_RX_CH1_EN
ASP_RX_CH1_RES
ASP Channel 2 Size and Enable.
0x5000B
Reserved
ASP_RX_CH2_AP
ASP_RX_CH2_EN
ASP_RX_CH2_RES
18 Configure PCM interface. HPF filter is used. Deemphasis off.
19 Configure PCM Filter
PCM Filter Option. 0x90000
FILTER_SLOW_FASTB
PHCOMP_LOWLATB
NOS
Reserved
HIGH_PASS
DEEMP_ON
20 Set Volume for Channel B
PCM Volume B. 0x90001
PCM_VOLUME_B
21 Set Volume for Channel A
PCM Volume A. 0x90002
PCM_VOLUME_A
VALUE
0x04
0000
01
00
0x01
0x01
0x00
0x00
0x08
0x08
0x00
0x00
0x1F
0x1F
0x00
0x00
0x3F
0x3F
0x00
0x00
0x0C
000
0
1
1
0
0
0x0A
000
0
1
010
0x00
0x00
0x00
0x00
0x07
0000
0
1
11
0x0F
0000
1
1
11
0x02
0
0
0
0 00
1
0
0x00
0x00
0x00
0x00
CS43130
5.10 Example Sequences
DESCRIPTION
XSP sample bit size is don't care
ASP sample bit size set to 32 bits
LSB of ASP sample rate fractional divide numerator
MSB of ASP sample rate fractional divide numerator
LSB of ASP sample rate fractional divide denominator
MSB of ASP sample rate fractional divide denominator
LSB of ASP LRCK high time duration
MSB of ASP LRCK high time duration
LSB of ASP LRCK period
MSB of ASP LRCK period
Set ASP port to be Slave
Configure clock polarity for I²S input
Configure ASP port to accept I²S input
ASP Channel 1 starts on SCLK0
ASP Channel 2 starts on SCLK0
ASP Channel 1 active phase
ASP Channel 1 enable
ASP Channel 1 size is 32 bits
ASP Channel 2 active phase
ASP Channel 2 enable
ASP Channel 2 size is 32 bits
High Pass Filter is selected
Set volume to 0 dB
Set volume to 0 dB
DS1073F1
73