CS43130 Datasheet, PDF (30/137 Pages) Cirrus Logic – 130-dB, 32-Bit High-Performance DAC with Integrated Headphone Driver

CS43130
4.3 Class H Amplifier Output
When the charge pump transitions from the lower to higher set of rail voltage, there is no delay associated with the
transition.
When the charge pump transitions from the higher to the lower set of rail voltages, there is an approximate 5.5-s delay
before the charge pump supplies the lower rail voltages to the amplifiers. This hysteresis ensures that the charge pump
does not toggle between the two rail voltages as signals approach the clip threshold. It also prevents clipping in the
instance of repetitive high-level transients in the input signal. Fig. 4-5 shows examples of this transitional behavior.
Output Level
5.5 s
–11 dB
–11.5 dB
Output Stage
Rail Voltage
+VP_LDO
+VCP
–VCP
–VP_LDO
Time
Figure 4-5. VCP_FILT Hysteresis
30
DS1073F1